The present invention relates to control apparatus for use in a high-performance, pipelined data processing system.
Pipelining is a technique used in data processing systems to enhance performance. In pipelining, the processing of a new instruction commences before the processing of the previous instruction is completed. Pipelining processes each instruction in several stages. Each stage performs a different function, such as instruction fetch, instruction decode, operand address generation, operand fetch, operand checking, execution and operand storing. In the pipeline, the instructions are offset by one or more stages. After one instruction has been processed in the first stage, it is processed in second, third, fourth and subsequent stages.
When the first instruction is being processed by the second stage, a second instruction can be processed in the first stage. When the first instruction goes to the third stage, the second instruction goes to the second stage and a third instruction is introduced into the first stage. The concurrent processing of instructions in a pipeline is well known in data processing systems. For example, see U.S. Pat. No. 3,840,861 entitled DATA PROCESSING SYSTEM HAVING AN INSTRUCTION PIPELINE FOR CONCURRENTLY PROCESSING A PLURALITY OF INSTRUCTIONS and assigned to the assignee of the present invention.
Each stage of the pipeline requires control logic for controlling the functions that are to be performed by that stage. Control logic can be either hard-wired or microprogrammed as described, for example, in the co-pending application entitled FLEXIBLE HARD-WIRED DECODER (AMDH 3916 DEL) assigned to the assignee of the present invention.
In data processing systems, the system is frequently organized into various units which perform different functions. For example, one system has an execution unit (E-Unit), an instruction unit (I-Unit), a storage unit (S-Unit), a memory bus controller unit (MBC-Unit), a high-speed buffer unit (HSB-Unit), and other units. Each of these different units performs different functions which are separately controlled. Together all of the units operate to execute instructions where each unit performs some function in connection with instructions. Each of the units has control apparatus which controls the functions performed by that unit. When the control apparatus is microprogrammed, the control executes microinstructions to control the functions. Microprogrammed control apparatus has been used in data processing systems for many years. Microprogrammed control provides great flexibility since changes in control can be made merely by changing microinstructions stored in the control store. When microprogrammed control apparatus is employed in high-performance systems, the speed with which microinstructions can be executed is slower than desired.
One technique for speeding the operation of microprogrammed control apparatus is described in the co-pending application entitled, MULTIPLE MODULE CONTROL STORE FOR USE IN A DATA PROCESSING SYSTEM, Ser. No. 184,126, filed on Sept. 4, 1980, and assigned to the assignee of the present invention. In that application, two or more parallel control stores operate concurrently to speed up branching and other operations during the execution of sequences of microinstructions.
The enhancement of the execution of instructions in the microprogrammed control apparatus is important. There is a need for even further enhancement of microprogrammed controllers, particularly ones which are optimized for controlling stages in a pipelined system.